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Daniel F. Feezell, Ph.D.

deezellDaniel F. Feezell, Ph.D.
Assistant Professor, Department of Electrical & Computer Engineering
The University of New Mexico

Dr. Feezell has disclosed four inventions to STC, received three UNM-affiliated issued U. S. patents, and has three pending U. S. patent applications for his semiconductor and LED technologies.

Present research efforts in nanoscale FETs (field effect transistors) technologies are focusing on alternative methods of increasing current control (specifically decreasing current leakage), device performance and device lifetime.  As FETs approach smaller nanoscale dimensions, there is a growing market need for more efficient gate technologies and configurations.

Developed in collaboration with Drs. Steven Brueck and Seung-Chang Lee at the Center for High Technology Materials (CHTM), Dr. Feezell’s gate-all-around FET technology allows for greater current control (less leakage) and increases device performance and longevity by using a well-defined, nanoscale, floating current channel from source to drain.  The floating channel is formed by selective etching techniques. The current channel is surrounded with Group III oxide formed by liquid-phase, chemical-enhanced oxidation or by SiO2 formed by atomic layer deposition.  Applications for the technology include semiconductors, integrated circuits and transistors.

From cellphones to radar, advanced high power and high frequency electronic applications benefit from high electron mobility transistors (HEMTs) in place of traditional FETs.  A commonly used material combination is gallium arsenide (GaAs) with aluminium gallium arsenide (AlGaAs), while in recent years, gallium nitride (GaN) HEMTs have attracted attention due to their high-power performance.

Developed in collaboration with Drs. Steven Brueck, Stephen Hersee, and Seung-Chang Lee at CHTM, Dr. Feezell’s heteroepitaxial layer technology is a method to optimally grow gallium nitride (GaN) and its alloy system with aluminium gallium nitride (AlGaN) on a silicon (Si) (100) surface.  The method is scalable and does not have a built-in polarization field, which allows normally-off operation—important for low-power consumption circuits.  The technology can be used in materials for future FETs and HEMTs, in optoelectronics such as lasers, solar cell arrays for satellites, LEDs, and in other mobile electronic devices.

Dr. Feezell’s research focuses on epitaxial growth, fabrication, and characterization of group III-nitride materials and devices, including nonpolar/semipolar orientations; solid-state lighting and high-efficiency LEDs; nanoscale selective-area epitaxy; superluminescent diodes; visible edge-emitting and vertical-cavity, surface-emitting lasers (VCSELs); nonpolar intersubband photodetectors; and III-nitride nanophotonics.

ISSUED U. S. PATENTS (UNM-AFFILIATED)
9,142,400    Methods of Making Heteroepitaxial Layer on a Seed Area, issued July 17, 2013
9,076,813    Gate-All-Around Metal-Oxide-Semiconductor Transistors with Gate Oxides, issued January 15, 2014
9,257,535    Gate-All-Around Metal-Oxide-Semiconductor Transistors with Gate Oxides, issued May 29, 2015

PENDING U. S. PATENT APPLICATIONS
Methods of Making Heteroepitaxial Structures and Device Formed by the Method
Superluminescent Light Emitting Diodes for Smart Lighting Systems
Rugged, Single Crystal Wide-Band-Gap-Material Scanning-Tunneling-Microscopy/Lithography Tips

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